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GATE EC : Analog Circuits Champion Quiz 1

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Question 1

In the silicon BJT circuit shown below, assume that the emitter area of transistor Q₁ is half that of transistor Q₂.
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The value of current I₀ is approximately

Question 2

The amplifier circuit shown below uses a silicon transistor. The capacitors C_C and C_E can be assumed to be short at signal frequency and the effect of output resistance r₀ can be ignored. If C_E is disconnected from the circuit, which one of the following statements is TRUE?

Question 3

The circuit shown in figure is best described as a

Question 4

If the circuit shown has to function as a clamping circuit, which one of the following conditions should be satisfied for sinusoidal signal of period T?
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Question 5

The diodes and capacitors in the circuit shown are ideal. The voltage v(t) across the diode D1 in steady state is

Question 6

In the circuit below, the diode is ideal. The voltage V is given by

Question 7

A regulated power supply shown in the figure below has an unregulated input (UR) of 15 Volts and generates a regulated output V_out. Use the component values shown in the figure.

In the figure above, the ground has been shown by the symbol.
If the unregulated voltage increases by 20%, the power dissipation across the transistor Q1

Question 8

For the Zener diode shown in the figure, the Zener voltage at the knee is 7V, the knee current is negligible and the Zener dynamic resistance is 10Ω. If the input voltage (V_i) range is from 10 to 16V, the output voltage (V₀) ranges from

Question 9

A small signal source

is applied to a transistor amplifier as shown below. The transistor has

and

. Which expression best approximates v₀(t)?

Question 10

In the voltage regulator shown in Figure, the load current can vary from 100mA to 500mA. Assuming that the Zener diode is ideal (i.e., the Zener knee current is negligibly small and Zener resistance is zero in the breakdown region), the value of R is
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ESE & GATE EC Analog Circuits

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