GATE EC : Analog Circuits Champion Quiz 4

The configuration of the following figure is a

The circuit shown below is driven by a sinusoidal input . The steady state output v₀ is

The oscillator circuit shown in figure has n ideal inverting amplifier. Its frequency of oscillation (in Hz) is

The value of C required for sinusoidal oscillations of frequency 1kHz in the circuit of Figure is

The current in an enhancement mode NMOS transistor biased in saturation mode was measured to be 1 mA at a drain-source voltage of 5 V. When the drain-source voltage was increased to 6V while keeping gate-source voltage same, the drain current increased to 1.02 mA. Assume that drain to source saturation voltage is much smaller than the applied drain-source voltage. The channel length modulation parameter (in V^–1) is ____.

Both transistors T1 and T2 in figure have a threshold voltage of 1 Volt. The device parameters K₁ and K₂ and T1 and T2 are, respectively, 36 µA/V² and 9 µA/V². The output voltage V₀ is

The h parameters of the circuit shown in figure are