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ESE EC : Digital Circuits Champion Quiz 2

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Question 1

What is the number of select lines required in a single input n-output demultiplexer?

Question 2

A binary full-subtractor.

Question 3

When two 16-input multiplexers drive a 2- input MUX, what is the result?

Question 4

Which one of the following statement is not correct?

Question 5

A half adder can be constructed using

Question 6

A 4 ×1 MUX is used to implement a 3-input Boolean function as shown below. The Boolean function F(A, B, C) implemented is
Description: F:\GradeStack Courses\GATE Tests (Sent by Ravi)\GATE-ME-20-April\GATE-IES-EC-Digital=Electronics-Circuits_files\image338.png

Question 7

Which of the following circuits come under the class of combinational logic circuits?
1). Full adder
2). Full subtractor
3). Half adder
4). J-K flip-flop
5). Counter
Select the correct answer from the codes given below:

Question 8

A digital multiplexer can be used for which of the following?
1). Parallel to serial conversion.
2). Many-to-one switch.
3). To generate memory chip select.
4). For code conversion.
Select the correct answer using the codes given below:

Question 9

Consider the following statement:
For 3 input variables a, b, c; a Boolean function y=ab+bc+ca represents.
1). a 3-input majority gate
2). a 3-input minority gate
3). carry output of a full adder
4). product circuit for a, b and c.
Which of the above statement are correct?

Question 10

How can the voltage comparator shown in the circuit given below be used in the analog-to-digital conversion?
Description: F:\GradeStack Courses\GATE Tests (Sent by Ravi)\GATE-ME-20-April\GATE-IES-EC-Digital=Electronics-Circuits_files\image324.png
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Feb 23ESE & GATE EC