GATE EE 2018 Exam: Digital Circuits Quiz 6

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Question 1

The logic circuit used to generate the active low chip select (CS) by an 8085 microprocessor to address a peripheral is shown in the following figure. The peripheral will respond to addresses in the range.

• AE000-EFFF
• B000E-FFFE
• C1000-FFFF
• D000l-FFF1

Question 2

A snapshot of the address, data and control buses of an 8085 Microprocessor executing a program is given below.

The assembly language instruction being executed is

• AIN 24 H
• BIN 20 H
• COUT 24 H
• DOUT 20 H

Question 3

Consider the following 8085 Microprocessor assembly language program.
1- LXI SP, 0200 H
2- LXI B, 1028 H
3- LXI H, 42FF H
4- PUSH H
5- LXI D, 20FE H
6- DAD B
7- X CHG
8- DAD D
9- HLT
After execution of above program content of HL register pair is ________ H.

• A7425
• B7526
• C7628
• D7729

Question 4

Consider the following instruction [X is any number from 0 to F]
STC
MVIA, X0H
RRC
RRC
RRC
RRC
HLT
After execution of above instructions in INTEL 8085 the content of accumulator will

• Aremain same
• Bbecome 1/10th of the original
• Cbecome 1X H
• Dbe divided by 16

Question 5

The logic circuit given below is used to generate chip select signal by INTEL 8085 Microprocessor to address a peripheral. The peripheral will respond to address in the range.

• A7800H-7FFFH
• B9800H-9FFFH
• C8000H-7FFFH
• D8800H-8FFFH

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