Time Left - 10:00 mins

GATE CS 2018 - Digital Logic Quiz-7 ( Combinational Circuits-1)

Attempt now to get your rank among 585 students!

Question 1

The logic function f (A, B, C, D) implemented by the circuit shown below is

Question 2

The output F of the 4-to-1 MUX shown in figure is

Question 3

Minimum 4 line to 16 line decoders required to realize 8 line to 256 line decoder are

Question 4

In the following truth table, V = 1 if and only if the input is valid.

What function does the truth table represent?

Question 5

Consider the following multiplexor where 10, 11, 12, 13 are four data input lines selected by two address line combinations A1A0=00,01,10,11 respectively and f is the output of the multiplexor. EN is the Enable input.

 

The function f(x,y,z) implemented by the above circuit is

  • 585 attempts
  • 3 upvotes
  • 16 comments
Apr 17GATE & PSU CS