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ISRO -2017 Digital logic Champion test

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Question 1

The minimum number of NAND gates required to implement the Boolean Function A + AB' + AB'C

Question 2

The logic circuit given below converts a binary code y₁, y₂, y₃ into

Question 3

The simplified sum of product form of the following Boolean expression

(P + Q’ + R’) * (P + Q’+ R) * (P + Q + R’) = π(3,2,1)

Question 4

The functional difference between SR flip flop and JK flip flop is that:

Question 5

Evaluate (X⊕Y)⊕Y

Question 6

The output expression of the following gate network is
$Description: E:\Gate\isro-cs\ISRO-CS-2011_files\image014.jpg$

Question 7

The switching expression corresponding to f(A,B,C,D)=Z(1,4,5,9,11,12) is

Question 8

The circuit shown in the given figure is a
$Description: Description: E:\Gate\isro-cs\ISRO_CS_2007_files\image010.jpg$

Question 9

Simplify the given boolean Equation.

AB + A'C + BC =

Question 10

The output Y of the given circuit is
$Description: E:\Gate\isro-cs\ISRO_CS_2008_files\image017.png$

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Apr 16GATE & PSU CS