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Mission ISRO CS 2017 Exam : Computer Organization Quiz-1

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Question 1

Match the following Data-transfer instructions with their meanings.

Question 2

8253/54 can be operated in ___________different modes. _________ It is used to generate an interrupt to the microprocessor after a certain interval.________________ This mode generates a strobe in response to an externally generated signal.

Question 3

While considering the 8051 Microprocessor Complete the following information
It has four channels which can be used over_____ I/O devices. Each channel has ___address and counter. Each channel can transfer data up to ____ Each channel can be programmed independently. It generates MARK signal to the peripheral device that _____ bytes have been transferred.

Question 4

The microinstructions stored in the control memory of a processor have a width of 26 bits. Each microinstruction is divided into three fields: micro operation fields of 13 bits, a next address field (X), and a MUX select field (Y). There are 8 bits status in the inputs of the MUX. How many bits are there in the X and Y fields, and what is the size of the control memory in number of words?

Question 5

Suppose two jobs, each of which needs 10 min of CPU time, start simultaneously. Assume 50%I/O wait time.
How long will it take for both to complete if they run sequentially?

Question 6

In which class of Flynns Taxonomy, von Neumann architecture belongs to?

Question 7

The addition of 4-bit, two’s complement, binary numbers 1101 and 0100 results in

Question 8

If a microcomputer operates at 5 MHz with an 8-bit bus and a newer version operates at 20 MHz with a 32-bit bus, the maximum speed-up possible approximately will be

Question 9

In X=(M+N×O)/(P×Q), how many one-address instructions are required to evaluate it?

Question 10

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GATE & PSU CS Computer Organization and Architecture

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