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Mini Mock on Analog & Digital Electronics for ESE 2018

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Question 1

A 5 mV, 1 kHz sinusoidal signal is applied to the input of an Op-Amp integrator for which R = 100 kΩ and C = 1μF. The output voltage is

Question 2

Match List I (name of the oscillator) with List II (Characteristics) and select the correct answer using the code given below the list:
List-I
A) Colpitts oscillator
B) phase shift oscillator
C) Tunnel diode oscillator
D) Relaxation oscillator
List-II
1) RC oscillator
2) LC oscillator
3) Negative resistance oscillator
4) Sweep oscillator

Question 3

The figure given below shows the circuit of which one of the following?

Question 4

Which one on the following type of negative feedback increases the input resistance and decreases the output resistance of an amplifier?

Question 5

The main advantage of active filter is that it can be realized without using:

Question 6

The output of the below Op-Amp circuit is

Question 7

If the Boolean expression Description: F:\GradeStack Courses\GATE Tests (Sent by Ravi)\GATE-ME-20-April\GATE-IES-EC-Digital=Electronics-Circuits_files\image166.pngis minimized, the expression becomes.

Question 8

Assertion (A): A look ahead carry adder is a fast adder.
Reason (R): A parallel carry adder generates sum digits directly from the input digits.

Question 9

Analyse the sequential circuit shown below in figure. Assuming that initial state is 00, determine what input sequence would lead to state11?

Question 10

If both inputs of S-R-NAND latch are low, the output will be.

Question 11

The threshold voltage for each transistor in the figure shown below is 3.0V. What are the values of V­i for this circuit to work as an inverter ?
Description: F:\GradeStack Courses\GATE Tests (Sent by Ravi)\GATE-ME-20-April\GATE-IES-EC-Digital=Electronics-Circuits_files\image461.png

Question 12

A 4-bit modulo-6 ripple counter uses J-K flip-flops. If the propagation delay of each flip-flop is 50 ns, the maximum clock frequency that can be used is.
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May 4ESE & GATE EE