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GATE EC 2018 (Analog Circuits): Rapid Quiz 2

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Question 1

A three stage amplifier with identical stages with lower cut off frequency per stage ‘f1’ is given overall negative feedback. Depending on the overall gain, the system may oscillate at a low frequency fc given by

Question 2

Including a small resistance in the source (emitter) of a CS (CE) amplifier provides the designer with a tool to improve the performance, that is

Question 3

In the figure shown below

If β = 100, Re = 1 kΩ, Vcc = 10 V, RB = 2 kΩ, VBE = 0.7 and RC = 2 kΩ, then the value of stability factor S will be

Question 4

In the circuit show, both the diodes are ideal,

If then the output waveform of the circuit can be represented by (assume all the diode to be ideal)

Question 5

A two sided limiting circuit has to be designed using two diode and two independent power supply which will supply power to a 1 kΩ load resistor with output voltage limiting levels of ± 3 V. Assuming the voltage gain of the circuit to be 0.95 V/V and the cut in voltages of diode to be 0.7. Then which of the following options represent that circuit?
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Feb 7ESE & GATE EC