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ISRO 2018: Computer Organization Booster Quiz- 3

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Question 1

Match the following Data-transfer instructions with their meanings.

Question 2

Consider a 33 MHz CPU based system. What is the number of wait states required if it is interfaced with a 60ns memory? Assume a maximum of 10ns delay for additional circuitry like buffering and decoding.

Question 3

Consider these different types of flags in 8085 microprocessor and select which information is not correct
I. Sign flag(s)– If sign bit is 1 then the sign flag is set to 1 and if the sign bit is zero then flag is reset to zero.
II. Zero flag(z)– If the result of any arithmetic or logical operation is zero i.e. all the bits are zero then flag is set to 1 else it is set to zero.
III. Auxiliary carry– (AC) this flag is set to 1 only when a carry is produced in the result.
IV. Parity flag (P) – when the result of any operation has odd number of ones then parity flag is set to 1 else if it has even number of ones then it is reset to 0.
V. Carry flag(C) – This flag is set to 1 only when any intermediate carry is produced. Else it is reset to 0.

Question 4

Consider the term “RET instruction” & choose which statement is not correct

Question 5

Find the memory address of the next instruction executed by the microprocessor (8086), when operated in real mode for CS = 1000 and IP = E000

Question 6

Complex Instruction Set Microprocessors (CISM) is _______________________________________

Question 7

Consider a disk pack with 16 surfaces, 128 tracks per surface and 256 sectors per track. 512 bytes of data are stored in a bit serial manner in a sector. The capacity of the disk pack and the number of bits required to specify a particular sector in the disk are respectively:

Question 8

In 8086, the jump condition for the instruction JNBE is?
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Mar 26GATE & PSU CS