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UGC-NET 2018: (Microprocessors & Interfacing) SpeedTest Quiz 8
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Question 1
The number of hardware interrupts (which require an external signal to interrupt) present in an 8085 microprocessor are
Question 2
Which of the following statement is INCORRECT about “READY” signal
Question 3
Which of the following statements is/are correct about CPI A0 H
(i) Content of accumulator is not affected.
(ii) Only sign parity and auxiliary carry flags are affected.
(iii) Only zero and carry flags are affected.
(i) Content of accumulator is not affected.
(ii) Only sign parity and auxiliary carry flags are affected.
(iii) Only zero and carry flags are affected.
Question 4
W and Z registers in the architecture of microprocessor 8085 are used for…….
Question 5
A jump instruction followed by a ret instruction in the subroutine _____________.
Question 6
In a microprocessor, the service routine for a certain interrupt starts from a fixed location of memory which cannot be externally set, but the interrupt can be delayed or rejected. Such an interrupt is
Question 7
Answer the following questions
i) A 32x8 RAM is capable of storing how many words; where the word size is 8 bits?
ii) For a 32x8 ROM, how many address line and data lines are required?
i) A 32x8 RAM is capable of storing how many words; where the word size is 8 bits?
ii) For a 32x8 ROM, how many address line and data lines are required?
Question 8
Which of the following parameter is improved by introducing pipelining in digital design?
Question 9
A micro controller differs from a microprocessor in terms of
Question 10
In a real time system, the simplest scheme that allows the operating system to allocate memory to two processes simultaneously is ______
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