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UGC-NET 2018: (Microprocessors & Interfacing) SpeedTest Quiz 9
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Question 1
In 8085 microprocessor, after the execution of RST 5 instruction, the program control shifts to
Question 2
Consider the following 8085 interrupts:
1). TRAP 2). INTR
3). RST 6 4). RST 7.5
5). RST 0
The software interrupts are
1). TRAP 2). INTR
3). RST 6 4). RST 7.5
5). RST 0
The software interrupts are
Question 3
With reference to 8085 microprocessor, which of the following statements are correct?
1). The DAD instruction adds the contents of the specified register pair to the contents of the DE register pair.
2). The program counter is an instruction pointer.
3). Whenever an instruction uses the HL pointer, the addressing is called indirect addressing.
4). HL register pair is also called data pointer.
1). The DAD instruction adds the contents of the specified register pair to the contents of the DE register pair.
2). The program counter is an instruction pointer.
3). Whenever an instruction uses the HL pointer, the addressing is called indirect addressing.
4). HL register pair is also called data pointer.
Question 4
On the 8085, which of the following machine cycles are not used in the CALL instruction?
1). Instruction fetch
2). I/O
3). Memory Read
4). Memory Write
1). Instruction fetch
2). I/O
3). Memory Read
4). Memory Write
Question 5
During direct memory access (DMA), the INTR and INTA (interrupt and interrupt acknowledge) lines.
Question 6
A memory system of size 32 kbytes is required to be designed using memory chips which have 12 address lines and 4 data lines each. What is the number of such chips required to design the memory system?
Question 7
Which of the following are the memory performance parameters?
1). Access time and latency
2). Block size and Block access time
3). Cycle time and Bandwidth
Select the correct answer from the codes given below:
1). Access time and latency
2). Block size and Block access time
3). Cycle time and Bandwidth
Select the correct answer from the codes given below:
Question 8
To configure port A and port B as output ports, port C not being used in the 8155 programmable interface, the control word should have the value.
Question 9
The semiconductor random access memory of a computer has 65.536 words, each of 8-bit. It can perform two basic operations Read and Write. How many bits are there in the Address Register of this memory?
Question 10
Consider the following loop :
MOVCX, 8000h
L1:DEC CX
JNZ L1
The processor is running at 14.7456/3 MHz and DEC CX requires 2 clock cycles and JNZ requires 16 clock cycles. The total time taken is nearly
MOVCX, 8000h
L1:DEC CX
JNZ L1
The processor is running at 14.7456/3 MHz and DEC CX requires 2 clock cycles and JNZ requires 16 clock cycles. The total time taken is nearly
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May 9ESE & GATE EC
