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GATE CS 2019 - Digital Logic Quiz-5 ( Combinational Circuits-1)

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Question 1

Without any additional circuitary, an 8:1 MUX can be used to obtain.

Question 2

Consider the digital circuit shown below

The digital circuit acts as

Question 3

A 1-bit full adder takes 20ns to generate carryout bit and 40ns for the sum bit. What is the maximum rate of addition per second when four 1-bit full adders are cascaded?

Question 4

Minimum number of 2-input NAND gates required to implement the function,
F= is

Question 5

Consider the circuit given below

Which of the following statements is true for Y.

Question 6

The logic function f (A, B, C, D) implemented by the circuit shown below is

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Apr 19GATE & PSU CS