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GATE 2019: Microprocessors Quiz 3

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Question 1

INTEL 8085 microprocessor is currently in ‘WAIT’ state then which of the following is true?

Question 2

Consider the following assembly language program
Mnemonics T - states
MVI A, 64 H 7
DSPLY: OUT PORT1 10
LOOP2: MVI B, 10 H 7
LXI D, 24FE H 10
LOOP1: DCX D 6
NOP 4
NOP 4
MOV A, D 4
ORA E 4
JNZ LOOP1 10/7
DCR B 4
JNZ LOOP2 10/7
DCR A 7
CPI 00 H 7
JNZ DSPLY 10/7
If above program is executed in 8085, operating at a frequency of 3.03 MHz then delay produced by LOOP1 is

Question 3

Consider a program written in assembly language
MVI B, 05 H
L1: MVI C, 0F H
L2: DCR C
JNZ L2
DCR B
JNZ L1
HLT
The total number of memory accesses required if the program is executed in 8085 is

Question 4

Consider an 8085-microprocessor system. The accumulator has data byte 05H and register C holds 96H. Carry flag CY = 1. Consider the program snippet below:
ORA C
ORI 85H
Which of the following is true at the end of the above program?

Question 5

Consider the following statements:
(i) Indirect addressing is not possible for for l/O mapped l/O port addresses.
(ii) Pointers can note be used to access memory mapped l
(iii)ALE signal is made high to latch lower order address bus to data bus.
(iv) Fewer machine instruction can be used with peripheral mapped l/O addressing as compared to memory mapped l/O addressing.
Which of the above statements is/are correct?

Question 6

An 8085 assembly language program is given below.
Line 1: MVI A, B5H
2: MVI B, 0EH
3: XRI 69H
4: ADD B
5: ANI 9BH
6: CPI 9FH
7: STA 3010H
8: HLT
The contents of the accumulator just after execution of the ADD instruction in line 4 will be
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Oct 11ESE & GATE EC