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GATE 2019: Digital Circuits Rapid Quiz 2

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Question 1

Find the minimum number of NOR gates required to construct a XNOR and a XOR gate respectively.

Question 2

The 9’s compliment for the decimal number 7543 is

Question 3

The state diagram of a finite state machine (FSM) designed to detect an overlapping sequence of three bits is shown in the figure. The FSM has an input „In‟ and an output ‘Out’. The initial state of the FSM is S0.
51.PNG
If the input sequence is 10101101001101, starting with the left-most bit, then the number times ‘Out’ will be 1 is __________.

Question 4

The figure shows a binary counter with synchronous clear input. With the decoding log shown, the counter works as a
Description: Description: D:\GradeStack Courses\GATE Tests (Sent by Ravi)\GATE EC 10-Mar\GATE-ECE-2015-Paper-2_files\image175.png

Question 5

Read the following statements:
(i) Gate is a combinational logic.
(ii) JK Flip-flop in toggle mode is not a combinational logic.
(iii) MSJK Flip-flop suffers from race-around.
(iv) Counters are sequential circuits.
Which choice is correct?

Question 6

An 8255 chip is interfaced with 8085 has I/O mapped I/O as shown in figure below. The address lines A3 to A7 as well as IO/M signals are used for address decoding. The address lines A0 and A1 are used by the 8255 chip to decode its 3 ports and control register internally. The range of addresses for which the 8255 chip would get selected is
Description: image017.png
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Jul 20ESE & GATE EC