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GATE 2019: Topper Quiz 14 (App update required to attempt this test)

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Question 1

A star connected synchronous motor at 100 kVA, 3-φ, 1400V, 23A, 60Hz, 126.5 rpm has an effective resistance of 0.5 ohm and a synchronous reactance of 10 ohm per phase. Determine internal power developed [in kW] by the motor when it is operating at rated current and 0.5 power factor leading.

Question 2

A 3

, 10 MVA, 13.8 KV, 50 Hz synchronous generator yield the following test data.
OC test I_f = 842 A at rated voltage
SC test I_f = 226 A at rated armature current
Calculated its p.u. adjusted synchronous reactance. OC test revealed that the armature resistance per phase is 0.75

.

[Write the answer upto two decimal point]

Question 3

_______ measured an unknown mutual inductance in terms of a standard mutual inductance.
Choose the correct option

Question 4

In the LC circuit shown below, inductance L = 2mH and capacitance C = 20 µF. The initial current through voltage is 100V. If the switch is closed at t=0, then the current

flowing through the circuit is

Question 5

The power MOSFET usually has an internal diode known as body diode connected between the source and the drain. What is the purpose of this body diode?

Question 6

If a symmetrical fault occurs on a power system, the percentage reactance of the system on 500 base MVA is 50% if the full load current corresponding to base kVA is 20A. If the base kVA is changed to 5000kVA, then the short circuit current becomes

Question 7

The positive and zero sequence equivalent reactances of a transposed overhead transmission line shown below are 21 Ω, 45 Ω respectively. Find X_s, X_m

Question 8

Match the following List-I (properties of time domain signal) with List-II (properties of Fourier transform).
List-I
A- Real and even
B- Real and odd
C- Imaginary and even
D- Imaginary and odd
List-II
1- Real and odd
2- Real and even
3- Imaginary and even
4- Imaginary and odd

Question 9

Find I in the circuit:

Question 10

For the operational amplifier circuit shown, the output saturation voltages are ±15V. The upper and lower threshold voltages for the circuit are, respectively.

Question 11

In the circuit shown in figure, A is a parallel in, parallel–out 4–bit register, which loads at the rising edge of the clock C. The input lines are connected to a 4–bit bus, W. Its output acts as the input to a 16 × 4 ROM whose output is floating when the enable input E is 0. A partial table of the contents of the ROM is as follows :

The clock to the register is shown, and the data on the W bus at time t₁ is 0110. The data on the bus at time t₂ is

Question 12

Consider the Bode plot shown in the figure. Assume that all the poles and zeros are real-valued.
$Description: D:\GradeStack Courses\GATE Tests (Sent by Ravi)\GATE EC 10-Mar\GATE-ECE-2015-Paper-3_files\image060.jpg$
The value of f_H – f_L (in H’z) is____________.

Question 13

Consider a unity feedback System having an open-loop transfer function