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GATE 2020 : Computer Organization & Architecture Quiz 4 (App update required to attempt this test)

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Question 1

The alternate way of writing the instruction, SUB #7,R1 is______. The above addressing mode is Immediate addressing mode

Question 2

An instruction is stored at location 300 with its address field at location 301. The address field has the value 400. A processor register R1 contains the number 200. What will be the addressing mode of the effective address of the instruction is 702?

Question 3

Consider a processor that includes a base with indexing addressing mode. Suppose an instruction is encountered that employs this addressing mode and specifies a displacement of 1970, in decimal. Currently the base and index register contain the decimal numbers 48022 and 8, respectively. What is the address of the operand ______ ?

Question 4

Consider a processor with 64 registers and an instruction set of size twelve. Each instruction has five distinct fields, namely, opcode, two source register identifiers, one destination register identifier, and a twelve-bit immediate value. Each instruction must be stored in memory in a byte-aligned fashion. If a program has 100 instructions, the amount of memory (in bytes) consumed by the program text is _____.

Question 5

Which of the following addressing modes are suitable for program relocation at run time?
(i) Absolute addressing
(ii) Based addressing
(iii) Relative addressing
(iv) Indirect addressing

Question 6

A machine has a 32-bit architecture, with 1-word long instructions. It has 64 registers and it needs to support 45 instructions, which have an immediate operand in addition to two register operands. Assuming that the immediate operand is an unsigned integer, the maximum value of the immediate operand is ____________
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