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GATE EC 2020: Digital Circuits Quiz 4
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Question 1
A digital system is required to amplify a binary-encoded audio signal. The user should be able to control the gain of the amplifier from a minimum to a maximum in 100 increments. The minimum number of bits required to encode, in straight binary is
Question 2
Consider the multiplexer based logic circuit shown in the figure.
Which one of the following Boolean functions is realized by the circuit?
Which one of the following Boolean functions is realized by the circuit?
Question 3
A 4-bit shift register circuit configured for right-shift operation, , is shown. If the present state of the shift register is ABCD = 1101, the number of clock cycles required to reach the state ABCD = 1111 is _________.
Question 4
For the circuit shown in the figure, the delays of NOR gates, multiplexers and inverters are 2 ns, 1.5 ns and 1 ns, respectively. If all the inputs P, Q, R, S and T are applied at the same time instant, the maximum propagation delay (in ns) of the circuit is_______.
Question 5
If X and Y are inputs and the Difference (D = X – Y) and the Borrow (B) are the outputs, which one of the following diagrams implements a half-subtractor?
Question 6
Figure I shows a 4-bits ripple carry adder realized using full adders and Figure II shows the circuit of a full-adder (FA). The propagation delay of the XOR, AND and OR gates in Figure II are 20 ns, 15 ns and 10 ns respectively. Assume all the inputs to the 4-bit adder are initially reset to 0.
At t=0, the inputs to the 4-bit adder are changed to
And
The output of the ripple carry adder will be stable at t (in ns) = _______
At t=0, the inputs to the 4-bit adder are changed to
And
The output of the ripple carry adder will be stable at t (in ns) = _______
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Jul 20ESE & GATE EC