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GATE 2021:AC- Rapid Mini Mock (App update required to attempt this test)

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Question 1

A transistor is interfaced with output port of an op-amp as shown. Determine the current (in mA) flowing through resistor R.

Question 2

For the given circuit drawn the output voltage V_o.

Question 3

For a n channel MOSFET biased in saturation region, the parameter

, V_TN = 0.8V and λ = 0.01/V, if the value of drain current flowing inside the MOS transistor is I_D = 0.75 mA, the value of intrinsic gain A₀ = g_mr₀ of the MOSFET is equal to :-

Question 4

Consider the transistor circuit shown below:-

If the transistor has β = 19 and V_E = 4V then.

Question 5

A voltage Controlled oscillator is designed by using a varactor diode as shown in figure. Capacitance of diode is considered to be 0.5 μF. Calculate the frequency of oscillator in kHz?

Question 6

A junction field effect transistor is shown in the figure. Its drain to source safe current is 20mA and pinch off voltage is -7.8 V. Also r_d is given as 30 kΩ

The voltage gain of the amplifier is

Question 7

If an amplifier has a peak-to-peak output voltage of 15 V across a load resistor of 1 kΩ, if the input power to the amplifier is 200 μW. Then power gain will be

Question 8

The output voltage of the regulated power supply shown in figure is

Question 9

Calculate CMRR in the following figure.

Question 10

The 555-timer circuit diagram is given below, its given that

and

What will be the duty cycle and frequency of the output wave respectively?

Question 11

An ideal voltage amplifier has voltage gain of –1000 and has 1 pF capacitor connected between input and output terminal. If the voltage source feeding amplifier has internal resistance of 100Ω, the upper 3-dB frequency will be ______ MHz.

Question 12

Consider the given amplifier circuit shown below. The circuit has following parameters

r_π = 0245 kΩ , V_t = 26mv

what is the value of 3 – dB frequency f₁(Hz) of the amplifiers due to coupling capacitor C_C ?

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ESE & GATE EC Analog Circuits

Dec 1ESE & GATE EC