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BARC Quiz-5

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Question 1

A direct mapped cache is of size 64 KB with block size 32 B. Logical address generated is 32 bit. What is the bits required for tag and block field?

Question 2

Is the following statement a declaration or definition?

extern int i;

Question 3

A memory system consisting of two levels L1 and L2. The required access times of those are 5 ns and 120 ns respectively. Another memory system has also two levels L3 and L4 whose access time are 10 ns and 150 ns respectively. The hit ratio of second system is 0.8 and average access time is twice than that of first system. What is the hit ratio of first system?

Question 4

What will be value after postfix evaluation of:
a+b*c^d/e+f

Question 5

Consider the following statements:

S1 : If all jobs arrive at the same p oint in time, a SJF and an SRTF scheduler will behave the same.

S2 : If all jobs arrive at the same point in time and have identical run lengths, a FIFO and a SJF scheduler will behave the same.

S3 : If all jobs have identical run lengths, a RR scheduler provides better average turnaround time than FIFO

S4 : With a MLFQ scheduler, high priority jobs have longer time-slices than low priority jobs.

Which of the following is true?

Question 6

A minimal DFA that is equivalent to a NDFA has:

Question 7

Consider these 2 statements:

S1: a*. ϕ = a*

S2: ϕ* = ϕ
Choose the correct statement.

Question 8

Which of the following involves shifting a program in memory such that a program does not notice the change?

Question 9

Suppose a Language L is accepted by Linear Bounded Automata A. Then,

Question 10

A computer system uses the Banker’s Algorithm to deal with deadlocks. Its current state is shown in the table below, where P0, P1, P2, P3, P4 are processes and R0, R1, R2 are resources types.


From the perspective of deadlock avoidance, which one of the following is true?

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Aug 18GATE & PSU CS