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ESE 2020 Technical Quiz || Sequential logic circuits-1

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Question 1

In a 4-bit serial in-parallel out right shift register shown in figure below. After four clock pulses are applied the content of the shift register will be

Question 2

A ‘n’ bit shift register can be used as

Question 3

The question consists of two statements, one labeled as the ‘Assertion (A)’ and the other as ‘Reason (R)’. You are to examine these two statements carefully and select the answers to these items using the codes given below:
A. Both Assertion (A) and Reason (R) are individually true and Reason (R) is the correct explanation of Assertion (A).
B. Both Assertion (A) and Reason (R) are individually true but Reason (R) is NOT the correct explanation of Assertion (A).
C. Assertion (A) is true but Reason (R) is false.
D. Assertion (A) is false but Reason (R) is true.

Assertion(A): A sequential circuit can be synchronous or asynchronous.
Reason(R): Synchronous or asynchronous circuit is decided by the manner in which the clock is provided to the circuit.

Question 4

The output Q_n of a J-K flip-flop is 1. It changes to 0 when a clock pulse is applied. The inputs J_n and K_n, before the application of clock pulse, are respectively

Question 5

Consider the following statements in Johnson counter:
1) A MOD-6 Johnson counter requires 3 FFs.
2) Johnson counter requires decoding gates.
3) To decode each count, one logic gate is used. Each gate requires only two inputs regardless of the number of FFs.
Which of these statements are correct?

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ESE & GATE EE Digital Electronics

Apr 28ESE & GATE EE