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GATE EE 2022: Signals & Systems Quiz 26

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Question 1

An n-bit carry Look ahead adder is designed using only Ex-OR, AND, OR gates. The propagation delay of each Ex-OR gate is 20 ns and that of each AND, OR gates is t0 ns. If the total propagation delay of adder circuit is 60 ns, then value of to will be (given that to ≤ 20 ns.

Question 2

To implement 3 input Ex-OR gate using 4×1 MUX the following arrangement has been done.

The input I0, I1, I2, and I3 in the same order that must be applied are

Question 3

The nature of this circuit is:

Question 4

The counter shown in figure below is a

Question 5Multiple Correct Options

Choose the correct option(s) in regard with Simplication of Boolean algebra:

Question 6

What is the output if we add the following two hexa decimal numbers CAD + DAD?
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Mar 6ESE & GATE EE