8051 Microcontroller architecture
pin diagram of 8051
- Pins 1 to 8− These pins are known as Port 1. This port doesn’t serve any other functions. It is internally pulled up, bi-directional I/O port.
- Pin 9− It is a RESET pin, which is used to reset the microcontroller to its initial values.
- Pins 10 to 17− These pins are known as Port 3. This port serves some functions like interrupts, timer input, control signals, serial communication signals RxD and TxD, etc.
- Pins 18 & 19− These pins are used for interfacing an external crystal to get the system clock.
- Pin 20− This pin provides the power supply to the circuit.
- Pins 21 to 28− These pins are known as Port 2. It serves as I/O port. Higher order address bus signals are also multiplexed using this port.
- Pin 29− This is PSEN pin which stands for Program Store Enable. It is used to read a signal from the external program memory.
- Pin 30− This is EA pin which stands for External Access input. It is used to enable/disable the external memory interfacing.
- Pin 31− This is ALE pin which stands for Address Latch Enable. It is used to demultiplex the address-data signal of port.
- Pins 32 to 39− These pins are known as Port 0. It serves as I/O port. Lower order address and data bus signals are multiplexed using this port.
- Pin 40− This pin is used to provide power supply to the circuit.
8051 Interrupts
Interrupts are the events that temporarily suspend the main program, pass the control to the external sources and execute their task. It then passes the control to the main program where it had left off.
8051 has 5 interrupt signals, i.e. INT0, TFO, INT1, TF1, RI/TI. Each interrupt can be enabled or disabled by setting bits of the IE register and the whole interrupt system can be disabled by clearing the EA bit of the same register.
IE (Interrupt Enable) Register
This register is responsible for enabling and disabling the interrupt. EA register is set to one for enabling interrupts and set to 0 for disabling the interrupts. Its bit sequence and their meanings are shown in the following figure.
EA | IE.7 | It disables all interrupts. When EA = 0 no interrupt will be acknowledged and EA = 1 enables the interrupt individually. |
- | IE.6 | Reserved for future use. |
- | IE.5 | Reserved for future use. |
ES | IE.4 | Enables/disables serial port interrupt. |
ET1 | IE.3 | Enables/disables timer1 overflow interrupt. |
EX1 | IE.2 | Enables/disables external interrupt1. |
ET0 | IE.1 | Enables/disables timer0 overflow interrupt. |
EX0 | IE.0 | Enables/disables external interrupt0. |
IP (Interrupt Priority) Register
We can change the priority levels of the interrupts by changing the corresponding bit in the Interrupt Priority (IP) register as shown in the following figure.
- A low priority interrupt can only be interrupted by the high priority interrupt, but not interrupted by another low priority interrupt.
- If two interrupts of different priority levels are received simultaneously, the request of higher priority level is served.
- If the requests of the same priority levels are received simultaneously, then the internal polling sequence determines which request is to be serviced.
- | IP.6 | Reserved for future use. |
- | IP.5 | Reserved for future use. |
PS | IP.4 | It defines the serial port interrupt priority level. |
PT1 | IP.3 | It defines the timer interrupt of 1 priority. |
PX1 | IP.2 | It defines the external interrupt priority level. |
PT0 | IP.1 | It defines the timer0 interrupt priority level. |
PX0 | IP.0 | It defines the external interrupt of 0 priority level. |
8051 Microcontroller Instruction
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