GATE CS 2022: Digital Logic-4

When one of the inputs of a two-input XOR gate is at Logic Low, the output will be _____ as the other input.

The minimum number of 2-input NAND gates Y required to implement the function F = (x' + y') (z + w) is

Consider the below circuit:

The propagation delay of each multiplexer is 50 ns. The frequency of the output signal V is

Consider the following sequential circuit consisting of 2 J-K flip flops and D flip flop :

The Mod value for this counter is_____________.

The number of unused states in a 4 bit Johnson counter is ______.

Consider the following circuit

The minimum number of NAND gate (having 2 fan-in) require to implement the same circuit is___. Assume complements of each variable are already available.